Over the last few years, MediaTek has generally always been considered the “other” SoC provider in the mobile industry, where most media and consumer attention has been given to the flagship SoC products by e.g. Apple, Qualcomm, Samsung and HiSilicon. The last time MediaTek had tried a true flagship SoC was actually several years ago with the Helio X20 and X30, before they saw very little success in the market and instead focused again on the mid-range and “premium” segments.
Today, MediaTek seeks to change this positioning. After seeing newfound success in the market, especially after seeing a fantastic 2020 and 2021, where the Taiwanese supplier is now able to claim the # 1 spot with 40% market share, as well as a growing 28% of 5G SoC market share, the company is now also aiming for recognition and leadership in the flagship market for SoC – this is where the new Dimensity 9000 comes in.
Dimensity 9000 is MediaTek’s latest effort to create an uncompromising flagship SoC, where designers throw everything but the kitchen sink into it in terms of specifications, representing a lot of industry innovations, such as the first Armv9 SoC with Cortex-X2, A710s and A510s CPUs , a new Mali-G710 GPU, first LPDDR5X-compatible SoC, astonishing camera ISP claims and the first directly publicly announced TSMC N4 silicon design in the industry. The list of features and capabilities is extensive, and the announcement today definitely represents MediaTek’s greatest efforts in generations and years.
Starting with the process node, MediaTek is able to claim a first in the industry, with the Dimensity 9000 being the world’s first TSMC N4 chip. Over the past few years, we have always been accustomed to either Apple or HiSilicon being the very first customers on TSMC’s latest leading nodes. When HiSilicon was cut off from TSMC, it left Apple as the obvious lead partner for TSMC’s new generation process nodes – however, the timing here just did not work for the A15, as the N4 node just was not ready yet. Since Qualcomm is currently affiliated with Samsung Foundry for their flagships (arguably without much success), this left a void for where HiSilicon used to be, which MediaTek is now seeking to fill. In fact, I think this would be the company’s first time where they really are on a leading knot since the 20nm days.
TSMC’s N4 node is assumed to be a smaller optical shrinkage relative to the N5 node, resulting in 6% more density with similar single-digit improvements in performance and efficiency. TSMC had announced risk production for the N4 to launch in 3Q21, and with the Dimensity 9000 scheduled to hit commercial devices in 1Q22, the chip is likely the leading product for the process node.
|New MediaTek Flagship SoC 2022|
@ 3.05 GHz 1x1024KB pL2
@ ~ 850MHz
|4x 16-bit CH
@ 3200MHz LPDDR5 / 51.2 GB / s
6 MB system cache
New generation of Triple 18-bit ISP
9GPix / s processing throughput
Simple sensor up to 320 MP
|NPU||5th generation 4 + 2 core APU|
|Media||8K30 & 4K120 code &
H.265 / HEVC, H.264, VP9
8K30 AV1 decoding
|Modem||(LTE Category 24/18)
(5G NR Sub-6)
|Mfc. Treat||TSMC N4|
There’s a lot to talk about the Dimensity 9000, so obviously enough, since MediaTek announces it as the first Armv9 SoC, let’s start with the CPU configuration and the various IPs used here.
Uncompromising CPU setup
Since it is an Armv9 SoC, this means that the company updates all CPU IPs using the new Cortex-X2, Cortex-A710 and Cortex-A510 IPs from Arm. We had covered the new generation of CPUs extensively earlier this year, so be sure to read up on these articles.
Dimensity 9000 comes with a 1 + 3 + 4 CPU setup that has experienced popularity in the market ever since Qualcomm took the setup for the first time in Snapdragon 855. For performance cores, MediaTek uses the new Cortex-X2 cores, equips them with entire 1 MB L2 cache and clocks them at up to 3.05 GHz. The clock frequency is higher than what we see from designs today on X1 cores such as Snapdragon 888 or Exynos 2100 at 2.86 and 2.9 GHz respectively, but the competing SoCs were also on an inferior Samsung 5LPE process node. We do not yet know exactly where the next generation Snapdragon and Exynos chips will end up compared to watches, but I think it is unlikely that they will exceed the 3GHz mark, leaving the new Dimensity 9000 with a likely frequency advantage, and thus also a likely single-thread leader position among Android SoC vendors.
MediaTek cites a performance jump of + 35% compared to the current generation of Android Flagship chips, which we assume will be a Snapdragon 888, but also indicates that the efficiency is + 37% better. This would mean that maximum absolute power levels for the MediaTek 9000’s X2 cores would be similar to what we see from the X1 cores in a Snapdragon 888 today, which is generally a good position to be in, and the numbers are generally in line with what we expect from IPC and process node differences between the designers.
MediaTek noted that the performance jump in more memory-bound workloads is much higher than more core-local workloads, for example SPECint2006, which sees an increase of +35%, while GeekBench 5 will only see an increase of +10.5% compared to competitors . This is also generally consistent with our understanding of the Cortex-X2, which points to low IPC improvements overall that do not take advantage of the increased cache in the CPU cluster.
The center cores of the Dimensity 9000 are 3x Cortex-A710 cores, equipped with 512KB L2s and clocked up to 2.85GHz. In this respect, MediaTek’s approach here is more similar to the Exynos 2100, using fairly high-frequency mid-cores, in contrast to the lower 2.4 GHz design point used by Qualcomm.
Next to the middle cores, we also see the new Cortex-A510 small cores, and here MediaTek does things completely differently compared to what we expected from the first iterations of the IP. Instead of using Arm’s new “merged-core” approach, where a Cortex-A510 complex can consist of two cores sharing a SIMD / FP pipeline as well as a shared L2, MediaTek completely ignores this design aspect of the IP and goes instead of the traditional route of using only one core per. complex, where each core thus has its own SIMD / FP pipeline and private L2 cache. The cache here is 256KB, which is also quite large, and below the maximum of 512KB. In fact, what MediaTek has done here is configure the A510 cores with an almost maximum performance setup. Although we still have our reservations about the cores, it’s good to see MediaTek not sparing on the new designs.
Due to the highly configured center cores as well as well-equipped small cores, the multi-core performance of the Dimensity 9000 is announced, which surpasses the current Android competition and falls in line with Apple’s performance on the A15.
At the cluster level, MediaTek also equips the DSU with 8 MB L3 – this is probably also the new generation DSU-110.
On the CPU side, the Dimensity 9000 is basically configured in the most optimal way – MediaTek went all-out in terms of frequencies and caches, and it is generally difficult to imagine a more efficient configuration than what the chip is set up with. currently, at at least in conjunction with Arm Cortex CPU IP.
First LPDDR5X, large system cache
Another world news for the Dimensity 9000 is the fact that it is the first chip announced to be compatible with the LPDDR5X. The standard had first been released by JEDEC in July this year, so the fact that the chip already supports it means that MediaTek was working on a draft and should be fully compatible with the new standard. While the full standard is announced to go up to 8533 Mbps support, the chip here limits itself to 7500 Mbps, so that means + 17% bandwidth compared to current generation LPDDR5-6400 solutions. Still, I was not expecting LP5X SoCs until late next year, so this was definitely a surprise. Of course, the memory controller still fully supports LPDDR5 at up to 6400 Mbps if a provider chooses to use different memory modules.
Dimensity 9000 is MediaTek’s first SoC to also use a 6MB system cache. During the briefing, MediaTek noted that larger caches and SoC designs with system caches are definitely the way forward and this is where everyone will aim for in the future. System-level cache, or how we like to call them abbreviated, SLCs, is capable of enhancing the performance of other SoC blocks than just the CPU, as well as reducing memory traffic to DRAM, which also has a positive benefit for power efficiency.
GPU: Mali G710MP10
On the GPU side of things, the MediaTek Dimensity 9000 is also the first SoC to see the rollout of the new Mali-G710 GPU. Earlier this year, when we talked about the IP, we had mentioned that MediaTek was the only remaining vendor expected to release a SoC with a larger Mali GPU implementation, given HiSilicon’s problems and Samsung’s adoption of AMD RDNA GPUs .
The configuration of the Dimensity 9000 is a 10-core. We need to keep in mind here that in terms of per-core performance, a new G710 core is roughly equivalent to two G78 cores, so in terms of size and performance, the new chip GPU is roughly comparable to the Google Tensor G78MP20 GPU, plus maybe an expected 20% performance increase due to generational IP enhancements. MediaTek noted that the peak frequencies were around 850MHz (exact clock to be confirmed).
In terms of performance, the company’s materials announced +35% compared to current Android flagships, while efficiency was +60% better. All of this year’s flagships had been pretty disappointing in terms of gaming efficiency, and we saw absolute power figures reach + 7.5-9W on the leading Exynos, Tensor and Snapdragon chips. MediaTek notes that their efficiency advantage is significantly greater than their performance jump, also suggesting that they use lower peak power levels than what we see today, which is certainly a welcome change.
The company notes the Ray Tracing capability, but this is simply a software API implementation rather than hardware, as the G710 does not yet support this.
MediaTek had a slide show that showed long-term performance compared to an iPhone 13 with A15, where the Dimensity 9000 was able to slightly surpass the iPhone’s performance. We saw that the new iPhones throttle to around 3-3.5W and that the phones under cellular conditions are reported to perform even worse due to the poor thermal. MediaTek notes that the comparison was made under a similar thermal budget, so hopefully the comparison is valid here. It should be noted, as we wrote in our A15 review, comparing real world games such as Genshin Impact to GPU analysis is not great as the game always runs with different internal resolutions or levels of detail, especially between Android and iOS.
That said, MediaTek’s efficiency requirements for the GPU position it extremely well and are likely to allow it to compete effectively against the upcoming Snapdragon and Exynos chips, which are still expected to arrive at less efficient process nodes.
Requirements for low power management
An interesting claim from MediaTek is that they achieve low-power leadership, thanks to the new TSMC N4 node as well as the smart power management that the SoC as well as the platform are designed with.
The above figures are comparisons of the overall power of the platform, excluding power supply to the display panel. This means that we see a power comparison of SoC, DRAM, PMICs, cellular RF and Wi-Fi systems – essentially the “platforms” components to which SoC providers generally respond and with which they combine their offerings. .
Notable figures here are the media playback and recording numbers, where the Dimensity 9000 is said to have much lower power consumption than the competition. Playing power is also said to be lower, but this can be expected given the GPU efficiency and lower power requirements.
The one data point I find most interesting is the idleness of the home. One of the hardest things to achieve in a silicon design is to do nothing in an efficient way, this actually represents a large percentage of energy consumption and affects a device’s baseline power and thus your daily battery life. Getting -20% over the competition here is quite respectable.